Greetings!
I am currently a Master's student studying Electrical and Computer Engineering at Carnegie Mellon University.
I have graduated from CMU with a B.S. in ECE with University Honors in May 2024.
I am advised by Prof. Brandon Lucia and a member of the ABSTRACT research group.
I have graduated from CMU with a B.S. in ECE with University Honors in May 2024.
I am advised by Prof. Brandon Lucia and a member of the ABSTRACT research group.
Research
I am interested in doing research on the boundary of computer architecture and computer systems, with a particular emphasis on optimizing computing
performance and efficiency beyond traditional scaling.
I am currently working on projects centered around the themes of energy-minimal computing, parallelism, and concurrency:
Research on the memory consistency model of a threaded Coarse-Grained Reconfigurable Architecture (CGRA).
Problem: Pipestitch is a CGRA with lightweight threads. When a Pipestitch program has multiple threads that communicate through memory, it is possible for the execution to violate Sequential Consistency (SC). To solve this problem, additional program analysis by the programmer/compiler and excessive fence placements are required.
Goal: Automatically enforce SC ordering at a low cost by adding microarchitectural support in a Pipestitch-like architecture.
Research on asynchronous programming for energy-minimal dataflow architectures.
Problem: Excessive operation reordering and synchronization is required for applications with irregular memory access patterns to run on resource-constrained CGRAs.
Goal: Explicitly express parallelism amenable to dataflow execution and the underlying CGRA architecture.
I am currently working on projects centered around the themes of energy-minimal computing, parallelism, and concurrency:
Research on the memory consistency model of a threaded Coarse-Grained Reconfigurable Architecture (CGRA).
Problem: Pipestitch is a CGRA with lightweight threads. When a Pipestitch program has multiple threads that communicate through memory, it is possible for the execution to violate Sequential Consistency (SC). To solve this problem, additional program analysis by the programmer/compiler and excessive fence placements are required.
Goal: Automatically enforce SC ordering at a low cost by adding microarchitectural support in a Pipestitch-like architecture.
Research on asynchronous programming for energy-minimal dataflow architectures.
Problem: Excessive operation reordering and synchronization is required for applications with irregular memory access patterns to run on resource-constrained CGRAs.
Goal: Explicitly express parallelism amenable to dataflow execution and the underlying CGRA architecture.
Teaching
- Fall 2023: Teaching Assistant for 18-344 Computer Systems and the Hardware-Software Interface
- Summer 2023: Teaching Assistant for 18-213/18-613 Introduction to Computer Systems
- Fall 2022: Teaching Assistant for 18-213/18-613 Introduction to Computer Systems
- Summer 2022: Teaching Assistant for 18-213/18-613 Introduction to Computer Systems
- Spring 2022: Teaching Assistant for 18-213/18-613 Introduction to Computer Systems